1. Field of the Invention
The present invention relates to methods for making electrooptical devices and driving substrates for the electrooptical devices. In particular, the present invention relates to a method suitable for, for example, a liquid crystal display having an active region of a top-gate-type thin-film insulating-gate field-effect transistor (hereinafter referred to as top-gate-type MOSTFT) using a single-crystal silicon layer, grown by heteroepitaxy on an insulating substrate, and a passive region. Herein, the top-gate types include a stagger type and a coplanar type. Also, the present invention relates to a method suitable for, for example, a liquid crystal display having an active region of a bottom-gate-type thin-film insulating-gate field-effect transistor (hereinafter referred to as bottom-gate-type MOSTFT) using a single-crystal silicon layer, grown by heteroepitaxy on an insulating substrate, and a passive region. Herein, the bottom-gate types include an inverted-stagger NSI type and an inverted-stagger ISI type. Moreover, the present invention relates to a method suitable for, for example, a liquid crystal display having an active region of a dual-gate-type thin-film insulating-gate field-effect transistor (hereinafter referred to as dual-gate-type MOSTFT) using a single-crystal silicon layer, grown by heteroepitaxy on an insulating substrate, and a passive region. These configurations are suitable for liquid crystal displays etc.
2. Description of the Related Art
Various types of active-matrix liquid crystal displays are known. For example, a liquid crystal display has a display region using amorphous silicon for TFTs and an IC for an external driving circuit. Another type of liquid crystal display integrates a display section using solid phase deposition polycrystalline silicon TFTs and a driving circuit, as disclosed in Japanese Patent Application Laid-Open No. 6-242433. Integration of a display section using excimer laser annealing polycrystalline silicon TFTs and a driving circuit is also known in Japanese Patent Application Laid-Open No. 7-131030.
Although conventional amorphous silicon TFTs have high productivity, they are not suitable for production of p-channel MOSTFTs (hereinafter referred to as pMOSTFTs) due to a low electron mobility of 0.5 to 1.0 cm2/v.sec. Since a peripheral driving section using pMOSTFTs and a display section cannot be formed on the same substrate, the driver IC should be an external component, which is mounted by, for example, a tape automated bonding (TAB) method, which has high production costs. This configuration inhibits production of high-resolution devices. Furthermore, the small electron mobility, as described above, causes a small ON current; hence, the size of the transistors in the display section is inevitably large, resulting in a small aperture ratio of pixels.
Conventional polycrystalline silicon TFTs have an electron mobility of 70 to cm2/v.sec and can facilitate production of high-resolution devices. Thus, liquid crystal displays (LCDs) which use polycrystalline silicon and are integrated with driving circuits have attracted attention. The above electron mobility, however, is insufficient for driving a large LCD of 15 inches or more, and thus ICs for an external driving circuit are required.
TFTs using polycrystalline silicon formed by a solid-phase deposition process require annealing at a temperature of 600xc2x0 C. or more for several tens of hours and thermal oxidation at approximately 1,000xc2x0 C. to from a gate SiO2 layer. Thus, the production of such TFTs requires using a semiconductor production apparatus. Thus, the wafer size is limited to 8 to 12 inches and the use of expensive heat-resistant quartz glass is inevitable, resulting in high production cost. Thus, the use of such TFTs is limited to EVF and audiovisual (AV) projectors.
Polycrystalline silicon TFTs produced by excimer laser annealing have many problems, including unstable output of the excimer lasers, low productivity, increasing price of the apparatus with increasing size, low yield and low quality. These problems are pronounced when large glass substrates having a side of, for example, 1 meter are used.
It is an object of the present invention to provide a method for uniformly depositing a single-crystal silicon thin-film having high electron/hole mobility at a relatively low temperature in a peripheral driving circuit to facilitate production of an electrooptical device such as a thin-film semiconductor display device using the single-crystal silicon thin-film, to form an integrated configuration of a display section including n-channel MOSTFTs (hereinafter referred to as nMOSTFTs) or pMOSTFTs having high switching characteristics and a lightly-doped drain (LDD) structure or complementary thin-film insulating gate electric field transistors (hereinafter referred to as cMOSTFTs) and a peripheral driving circuit including cMOSTFTs, nMOSTFTs, and/or pMOSTFTs, to facilitate production of a large display panel with high quality, high definition, a narrow frame, and high efficiency, to facilitate the use of a large glass substrate which has a low distortion point and does not require expensive facilities, to readily control the threshold voltage (Vth) of the device, and to facilitate operation of the device at a high rate due to reduced resistance.
The present invention is directed to a method for making an electrooptical device comprising a first substrate (a driving substrate) including a display section provided with pixel electrodes (arranged in a matrix) and a peripheral-driving-circuit section provided on a periphery of the display section, a second substrate (opposite substrate), and an optical material disposed between the first substrate and the second substrate, and to a method for making a driving substrate for the electrooptical device.
According to a first aspect of the present invention, the method for making an electrooptical device comprises the steps of: forming a material layer having a high degree of lattice matching with single-crystal silicon on one main face of the first substrate; forming a polycrystalline or amorphous silicon layer having a given thickness on the first substrate including the material layer and then forming a low-melting-point metal layer on or under the polycrystalline or amorphous silicon layer on the first substrate, or forming a low-melting-point metal layer containing silicon on the first substrate having the material layer; dissolving the polycrystalline or amorphous silicon layer or the silicon into the low-melting-point metal layer by a heat treatment; precipitating a single-crystal silicon layer from the silicon in the polycrystalline or amorphous silicon layer or the silicon in the low-melting-point metal layer by heteroepitaxy including a cooling treatment using the material layer as a seed; and treating the single-crystal silicon layer through a predetermined process to form at least an active device between the active device and a passive device.
According to a second aspect of the present invention, the method for making an electrooptical device comprises the steps of: forming a gate section comprising a gate electrode and a gate insulating film on one face of the first substrate; forming a material layer having a high degree of lattice matching with single-crystal silicon on the same face of the first substrate; forming a polycrystalline or amorphous silicon layer having a given thickness on the first substrate including the material layer and the gate section, and then forming a low-melting-point metal layer on or under the polycrystalline or amorphous silicon layer on the first substrate, or forming a low-melting-point metal layer containing silicon on the first substrate having the material layer; dissolving the polycrystalline or amorphous silicon layer or the silicon into the low-melting-point metal layer by a heat treatment; precipitating a single-crystal silicon layer from the silicon in the polycrystalline or amorphous silicon layer or the silicon in the low-melting-point metal layer by heteroepitaxial growth including a cooling treatment using the material layer as a seed; and treating the single-crystal silicon layer through a predetermined process to form a channel region, a source region, and a drain region; and forming a bottom-gate first thin film transistor having the gate section below the channel region and constituting a part of the peripheral driving circuit section.
According to a third aspect of the present invention, the method for making an electrooptical device comprises the steps of: forming a gate section comprising a gate electrode and a gate insulating film on one face of the first substrate; forming a material layer having a high degree of lattice matching with single-crystal silicon on the same face of the first substrate; forming a polycrystalline or amorphous silicon layer having a given thickness on the first substrate including the material layer and the gate section, and then forming a low-melting-point metal layer on or under the polycrystalline or amorphous silicon layer on the first substrate, or forming a low-melting-point metal layer containing silicon on the first substrate having the material layer; dissolving the polycrystalline or amorphous silicon layer or the silicon into the low-melting-point metal layer by a heat treatment; precipitating a single-crystal silicon layer from the silicon in the polycrystalline or amorphous silicon layer or the silicon in the low-melting-point metal layer by heteroepitaxial growth including a cooling treatment using the material layer as a seed; and treating the single-crystal silicon layer through a predetermined process to form a channel region, a source region, and a drain region; and forming a dual-gate first thin film transistor having the gate sections above and below the channel region and constituting a part of the peripheral driving circuit section.
According to a fourth aspect of the present invention, the method for making an electrooptical device comprises the steps of: forming a gate section comprising a gate electrode and a gate insulating film on one face of the first substrate; forming a material layer having a high degree of lattice matching with single-crystal silicon on the same face of the first substrate; forming a melt layer of a low-melting-point metal containing silicon on the first substrate including the material layer and the gate section; precipitating a single-crystal silicon layer from the silicon in the melt layer by heteroepitaxial growth including a cooling treatment using the material layer as a seed; treating the single-crystal silicon layer through a predetermined process to form a channel region, a source region, and a drain region; and forming a bottom-gate first thin film transistor having the gate section below the channel region and constituting a part of the peripheral driving circuit.
According to a fifth aspect of the present invention, the method for making an electrooptical device comprises the steps of: forming a gate section comprising a gate electrode and a gate insulating film on one face of the first substrate; forming a material layer having a high degree of lattice matching with single-crystal silicon on the same face of the first substrate; forming a melt layer of a low-melting-point metal containing silicon on the first substrate including the material layer and the gate section; precipitating a single-crystal silicon layer from the silicon in the melt layer by heteroepitaxial growth including a cooling treatment using the material layer as a seed; treating the single-crystal silicon layer through a predetermined process to form a channel region, a source region, and a drain region; and forming a dual-gate first thin film transistor having the gate sections above and below the channel region and constituting a part of the peripheral driving circuit.
In the present invention, the single-crystal silicon layer includes a single-crystal silicon layer and a single-crystal compound semiconductor layer. The active device includes a thin-film transistor and other devices such as a diode. The active device includes a resistor, an inductor, and a capacitor. For example, the active device is a capacitor formed by sandwiching a high-dielectric film of, for example, silicon nitride (SiN) with the single-crystal silicon layers (electrodes) having low resistance. Typical thin film transistors are field emission transistors (FETs including a MOS type and a junction type) and bipolar transistors. The present invention is applicable to these transistors.
In accordance with the present invention, a single-crystal semiconductor thin-film, such as a single-crystal silicon thin-film, is formed by heteroepitaxy using the material layer having a high degree of lattice matching with single-crystal silicon, e.g., a crystalline sapphire film, as a seed, from a low-melting-point metal layer which dissolves a semiconductor material, such as polycrystalline silicon or amorphous silicon, and is used for active devices, such as top-gate, bottom-gate, and dual-gate MOSTFTs, in a peripheral driving circuit of a driving substrate such as an active-matrix substrate and in a peripheral driving circuit of an electrooptical device, such as a liquid crystal device (LCD) integrating a display section and a peripheral driving circuit, and for passive devices, such as resistors, inductors, and capacitors. The following outstanding advantages (A) to (H) are achieved in the present invention.
(A) The material layer having a high degree of lattice matching with single-crystal silicon (for example, a sapphire film) is formed on the substrate, and a single-crystal silicon layer, such as a single-crystal silicon thin-film, is deposited by heteroepitaxy using the material layer as a seed. The single-crystal silicon layer has a high electron mobility of at least 540 cm2/v.sec. Thus, an electrooptical device, such as a thin-film semiconductor display device having a high-speed driver, can be produced.
(B) Since this single-crystal silicon thin-film has high electron and hole mobility, single-crystal silicon top-gate, bottom-gate, and dual-gate MOSTFTs can form an integrated configuration of a display section including nMOSTFTs, pMOSTFTs or cMOSTFTs having high switching characteristics and a lightly-doped drain (LDD) structure, which moderates the intensity of the electric field and reduces leakage current, and a peripheral driving circuit including cMOSTFTs, nMOSTFTs, and/or pMOSTFTs having high driving characteristics. Such an integrated configuration facilitates production of a large display panel with high quality, high definition, a narrow frame, and high efficiency. Since this single-crystal silicon thin-film has high hole mobility, a peripheral driving circuit for driving electrons and holes independently or in combination can be provided and integrated with display TFTs of nMOS, pMOS or cMOS LDD-type. In a compact or small panel, either of a pair of vertical peripheral driving circuits may be omitted.
(C) The polycrystalline or amorphous silicon layer can be formed by a plasma-enhanced or reduced-pressure CVD process at a substrate temperature of 100 to 400xc2x0 C. using the material layer as a seed for epitaxy, and the low-melting-point metal layer can be formed by a vacuum evaporation process or a sputtering process. In addition, the single-crystal silicon layer can be uniformly formed on the insulating substrate at a relatively low heating temperature, for example, 400 to 450xc2x0 C., because the heating treatment during the silicon epitaxy can be performed at 930xc2x0 C. or less.
(D) The method in accordance with the present invention does not include annealing at a middle temperature (approximately 600xc2x0 C.) for several ten hours or excimer laser annealing and an expensive production facility. Thus, the method has high productivity with low production costs.
(E) In the heteroepitaxy in the present invention, a single-crystal silicon thin-film having a variety of P-type impurity concentration and high mobility can be readily produced by adjusting the ratio of polycrystalline silicon or amorphous silicon to a low-melting-point metal, and the heating temperature and the cooling rate of the substrate. Thus, the threshold voltage (Vth) of the device can be readily controlled and the device can operate at a high rate due to reduced resistance.
(F) When the low-melting-point metal layer containing polycrystalline or amorphous silicon is deposited, the layer is doped with an adequate amount of Group III or V impurity, such as boron, phosphorus, antimony, arsenic, bismuth or aluminum, so that the type and the concentration of the impurity in the heteroepitaxial single-crystal silicon thin-film, that is, the type (P-type or N-type) and the carrier concentration are controlled without limitation.
(G) The material layer such as a crystalline sapphire thin-film functions as a diffusion barrier against various atoms and can suppress diffusion of impurities from the glass substrate.
(H) When the dual-gate MOSTFTs are formed in the peripheral driving circuit, the cMOSTFT, nMOSTFT, and pMOSTFT have a drive capability which is 1.5 to 2 times higher than that of single-gate types. Thus, the dual-gate MOSTFTs are suitable for a peripheral driving circuit requiring TFTs having high drive capability. One of the pair of vertical driving circuits can be omitted by using the MOSTFTs. Moreover, the dual-gate MOSTFTs are suitable for electrooptical devices other than LCDs, such as organic ELs and FEDs. Moreover, this configuration can be readily changeable to top-gate types or bottom-gate types by selecting the upper or lower gate section. If one of the upper and lower gate sections does not work, the other can be used.